Charge Noise And Dephasing In Silicon Based Lateral Quantum Dots

Quantum computing has become a thriving field over the past several decades. Although many candidate systems exist, this dissertation will focus on quantum dots as a quantum computing implementation, specifically lateral quantum dots in silicon based heterostructures. Lateral quantum dots use trapped electrons in semiconducting heterostructures to form qubits, the basic building block of a quantum computer. There are several potential qubit implementations using quantum dots and new qubit schemes, such as the valley qubit presented in Chapter 4, are still being investigated. Many of these implementations have already been successfully demonstrated. In this sense, research into quantum dots is a maturing field, having successfully demonstrated proof of concept for multiple qubit implementations. If quantum dots are to succeed as a quantum computing platform research needs to focus on improving the qubits themselves. Decoherence and dephasing need to be improved, but also yield and reproducibility. In this work I describe experiments intended to help understand and improve the performance of lateral quantum dots. I fabricated multiple lithographically identical devices on Si/SiO2 and Si/SiGe heterostructures to compare charge noise on the two Silicon based substrates. I describe the first conclusive observation and characterization of a valley based qubit. The noise characteristics of the valley qubit are particularly attractive as it's operation is resistant to charge noise, the primary source of noise in Silicon based qubits. Finally I present the ongoing development of a novel gate architecture for lateral quantum dots. Called a hybrid architecture, this design possesses good tunability along with simple fabrication and a reduced number of total gates relative to other leading architectures; this has the potential to dramatically improve yield and scalability.