Implementation Of Canny Edge Detection Using Hlshigh Level Synthesis

Hardware implementation to process the image is useful to accomplish low power and high-speed requirement of currently embedded application. Thus, one of the excellent solutions is to combine processing systems and hardware accelerators. Edge detection is one of the primary blocks in the image processing, and Canny edge detection algorithm is most widely used edge detection algorithm.In this project hardware accelerator of different blocks of canny edge detection algorithm is proposed using High-Level Synthesis. The main approach is to target canny edge detection algorithm to Programmable Logic part of SoC and accelerate the implementation on Zynq platform. This can be further extended to perform real-time image processing.