Power-efficient Two-step Pipelined Analog-to-digital Conversion

Power-efficient Two-step Pipelined Analog-to-digital Conversion
Author: Ho-Young Lee
Publisher:
Total Pages: 107
Release: 2011
Genre: Pipelined ADCs
ISBN:

Download Power-efficient Two-step Pipelined Analog-to-digital Conversion Book in PDF, Epub and Kindle

Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that involves high-performance analog-to-digital conversion combined with very low power consumption. This dissertation presents two different approaches to achieving high power efficiency from a two-step pipelined architecture, which is generally known as one of the most power-consuming analog-to-digital converters. In the first approach, an analog feedback loop of a residue amplifier in a two-step pipelined analog-to-digital converter is reconfigured digitally using a single comparator and an R-2R digital-to-analog converter. This comparator-based structure can reduce power consumption of a conventional two-step pipelined analog-to-digital converter which consists of an opamp-based residue amplifier followed by a second- stage analog-to-digital converter. In addition, this dissertation includes circuit design techniques that provide a digital offset correction for the comparator-based two-step structure, binary-weighted switching for an R-2R digital-to-analog converter, and reference trimming for a flash analog-to-digital converter. A 10-b prototype analog-to-digital converter achieves an FOM of 121 fJ/conversion-step under 0.7-V supply. The second approach provides a way to achieve low power consumption for a high-resolution two-step pipelined analog-to-digital converter. An opamp is designed to consume optimized static power using a quarter-scaled residue gain together with minimized loading capacitance from the proposed second stage. A 14-b prototype analog-to-digital converter achieves an FOM of 31.3 fJ/conversion-step with an ENOB of 11.4 b, which is the lowest FOM in high-resolution analog-to-digital converters having greater than an ENOB of 10 b. Finally, the potential for further power reduction in a two-step pipelined analog-to-digital converter is discussed as a topic for future research.


Power-efficient Two-step Pipelined Analog-to-digital Conversion
Language: en
Pages: 107
Authors: Ho-Young Lee
Categories: Pipelined ADCs
Type: BOOK - Published: 2011 - Publisher:

GET EBOOK

Hand-held devices are among the most successful consumer electronics in modern society. Behind these successful devices, lies a key analog design technique that
Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems
Language: en
Pages: 200
Authors: Xinpeng Xing
Categories: Technology & Engineering
Type: BOOK - Published: 2017-10-04 - Publisher: Springer

GET EBOOK

This book discusses both architecture- and circuit-level design aspects of voltage-controlled-oscillator (VCO)-based analog-to-digital converters (ADCs), especi
Reference-Free CMOS Pipeline Analog-to-Digital Converters
Language: en
Pages: 189
Authors: Michael Figueiredo
Categories: Technology & Engineering
Type: BOOK - Published: 2012-08-24 - Publisher: Springer Science & Business Media

GET EBOOK

This book shows that digitally assisted analog to digital converters are not the only way to cope with poor analog performance caused by technology scaling. It
Power Efficient Analog-to-digital Converters Using Both Voltage and Time Domain Information
Language: en
Pages: 87
Authors: Taehwan Oh
Categories: Analog-to-digital converters
Type: BOOK - Published: 2013 - Publisher:

GET EBOOK

As advanced wired and wireless communication systems attempt to achieve higher performance, the demand for high resolution and wide signal bandwidth in their as
Time-interleaved Analog-to-Digital Converters
Language: en
Pages: 148
Authors: Simon Louwsma
Categories: Technology & Engineering
Type: BOOK - Published: 2010-09-08 - Publisher: Springer Science & Business Media

GET EBOOK

Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of th