Strain Induced Effects On Lateral Power Mosfets

Experiments demonstrate that strain breaks the on-resistance/breakdown voltage tradeoff by enhancing on-resistance while maintaining breakdown voltage. There are differences between logic MOSFETs and power MOSFETs. Experimental results for n-type power MOSFETs show reduced enhancement with stress. This is explained by effect of vertical spreading of carriers into the substrate. On-resistance distribution has therefore been studied and piezoresistance coefficients are modeled to validate experimental results. In summary, this work proves strain to be beneficial in improving lateral power MOSFETs performance and provides the most favorable channel direction and stress type for the first time.