Switch-Level Timing Simulation of MOS VLSI Circuits

Switch-Level Timing Simulation of MOS VLSI Circuits
Author: Vasant B. Rao
Publisher: Springer Science & Business Media
Total Pages: 218
Release: 2012-12-06
Genre: Technology & Engineering
ISBN: 1461317096

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Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were a research curiosity and in general were mistrusted by most designers and test engineers. In those days the programs were not user friendly, models were inadequate, and the algorithms were not very robust. The demand for simulation tools has been driven by the increasing complexity of integrated circuits and systems, and it has been aided by the rapid decrease in the cost of com puting that has occurred over the past several decades. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging. In this book only one aspect of the analysis and design process is examined. but it is a very important aspect that has received much attention over the years. It is the problem of accurate circuit and timing simulation.


Switch-Level Timing Simulation of MOS VLSI Circuits
Language: en
Pages: 218
Authors: Vasant B. Rao
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

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Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Simulation tools were
Switch-level Timing Simulation of MOS VLSI Circuits
Language: en
Pages: 476
Authors: Vasant Bangalore Rao
Categories:
Type: BOOK - Published: 1985 - Publisher:

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This report deals with the development of a fast and accurate simulation tool for very-large-scale integrated (VLSI) circuits consisting of metal-oxide-semicond
Switch-Level Timing Simulation of MOS VLSI (Metal-Oxide-Semiconductor Very Large-Scale Integrated) Circuits
Language: en
Pages: 246
Authors: Vasant B. Rao
Categories:
Type: BOOK - Published: 1985 - Publisher:

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This report deals with the development of a fast and accurate simulation tool for very-large-scale integrated (VLSI) circuits consisting of metal-oxide-semicond
Digital Timing Macromodeling for VLSI Design Verification
Language: en
Pages: 276
Authors: Jeong-Taek Kong
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

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Digital Timing Macromodeling for VLSI Design Verification first of all provides an extensive history of the development of simulation techniques. It presents de
A New Approach to Switch-level Timing Simulation of CMOS VLSI Circuits
Language: en
Pages: 108
Authors: David Vincent Overhauser
Categories:
Type: BOOK - Published: 1985 - Publisher:

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